Analog & MS IP

This Program provides priority access to mixed-signal product design kits and multiple process wafer (MPW) runs for prototyping.

Companies currently providing IP for the Common Platform Technology for 90nm and 65nm are:

• Analog Bits Inc


• Artisan ARM Physical IP


• Chipidea Microelectronics


• Synopsys


• True Circuits

Companies listing IP for earlier technology are:

• Analog Bits Inc


• Advanced RFIC(S) Ptd Ltd


• Artisan ARM Physical IP


• Catena Holding bv


• Chipidea Microelectronics


• Cosmic Circuits


• Mixel


• Nordic Semiconductor ASA


• Synopsys


• True Circuits

These companies have developed a wide range of IPs for the Program since its inception. Details of these products can be found via the Chartered IP View below.

Chartered Teams Up with the Chip Estimate to Streamline SOC Design Process with Fast Access to Mixed-Signal IP

IPs listed on Chip Estimate use the following qualification definitions:

• Available on request: The IP has been designed in a similar technology and can be ported to CHRT technology on request.
• Pre-Silicon: The IP is in process of being designed, manufactured, or tested for the specified technology.
  
• Silicon Verified: The IP has been manufactured and verified in silicon for the specified technology.

For more information, please send all inquiries to AMS_IP@charteredsemi.com

• Chipidea, Chartered Collaborate to Offer Advanced Mixed-Signal IP in 65nm
• Chartered Becomes First Foundry to Streamline Customer Connection with New IP Portal
• IBM and Chartered Team with Synopsys for Mixed-Signal Connectivity IP at 65 NM

• PCI Express
• XAUI
• SATA
• 6G Backplane SerDes

• 10-bit, 150MHz Pipeline ADC
• 10-bit, 80 MHz, IQADC
• 10-bit, 200 MHz, Current-Steering Triple Video DAC

• USB 2.0 nanoPHY

ARM

High-Speed PHYs Velocity Serial Link Overview
ARM's Artisan Velocity High-Speed PHY products address the multiple existing and emerging interface standards with a scalable and highly architected silicon-efficient IP solution.

ChipIdea

Chartered IP Porfolio
CHIPIDEA has consolidated its IP cores and solutions around design-efficient platforms that significantly accelerate design cycles to meet time-to-market requirements from customers.

Synopsys

DesignWare Cores USB 2.0 On-The-Go (OTG) PHY
The Synopsys DesignWare® Hi-Speed USB 2.0 On-The-Go (HS OTG) PHY is a complete mixed-signal semiconductor intellectual property (IP) solution, designed for single-chip, USB 2.0 integration in OTG applications.