Chartered
Home | Careers | Contact Us | eServices | COLAS
About Chartered |  Technology |  Design Access |  Manufacturing |  Investor Relations |  Media Center |  Events
 

Home > Design Access > Chartered Express

design access
design access
Home
About Chartered
Technology
Design Access
References Flows
Semi-Custom
Synopsys
Cadence
Magma
Custom
Cadence PDK's
Mentor TDK's
Tech Files
Libraries
Memory IP
Analog & MS IP
Digital IP
Chartered Express
IP Access Program
Manufacturing
Investor Relations
Media Center
Events
Careers
Contact Us

Chartered Express™ Schedules for 2008

 
  2008
  Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec
45nm
Baseline Logic
        *     *    
65nm
Baseline Logic
           
90nm
Baseline Logic
       


  *
 
 
0.13µm
Baseline, RF/MS
     
   
0.18µm
CHRT Baseline (CB), RF/MS;
Industry Baseline(IC)
CheckCB   IC CheckCB   CheckIC CB
CheckIC

CB

*
0.25µm
Baseline, RF/MS
    Check       Check       Check  
0.35µm
Baseline, OTP, or EEPROM
  CheckGP2  
 
   
 
 

- Customers DRC-Clean GDSII Tape-out dateline. Please submit reservations one month prior.

* - These MPW schedules are yet to be confirmed.

Rev. 15FEB08

 

 

 

Terms of Use   Sitemap Copyright 2008. Chartered Semiconductor Manufacturing | Regn No: 198703584-K. All Rights Reserved.