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Libraries

Open Model Library Access

Partners	0.35µm	0.25µm	0.18µm	0.13µm
Synopsys	Standard Cell Library IO Pad Library Memory Compilers	Standard Cell Library IO Pad Library Memory Compilers	Standard Cell Library IO Pad Library Memory Compilers	Standard Cell Library IO Pad Library Memory Compilers
ARM	N.A	Standard Cell Library IO Pad Library	Standard Cell Library IO Pad Library Memory Compilers	Standard Cell Library IO Pad Library Memory Compilers
Virage Logic	Memory Compilers (SPSRAM, 2P Regfile)	Memory Compilers (SPSRAM, DPSRAM, 1P & 2P Regfile)	Memory Compilers (SPSRAM, DPSRAM, 2P Regfile, ROM)	Memory Compilers (SPSRAM, DPSRAM, 1P & 2P Regfile, ROM)
Notes	Synopsys Library Free Download to all Customers. Nominal Tape-Out Fee Applies. First Year Free Support & Maintenance from Synopsys.
	ARM Library Free Download to all Customers. Optional Support & Maintenance available for nominal fee from Artisan
	Virage Logic Library Available for Nominal License Fee. Optional Support & Maintenance available for nominal fee from Virage

0.13µm LV / HP(LVOD)

Partner

ARM
HP

ARM
HP High VT

Virage Logic
HP

Virage Logic
LV

Status

Silicon Validation Reports are Available Upon Request
Design Kits are available from Each Partners

Standard
Cells

SAGE-X2™
Standard
Cell Library

ASAP™ HD
Standard
Cell Library

Memory

Sync Single Port
HS/HD SRAM Compiler

ASAP™ Sync Single Port
HD SRAM Compiler

2 Port Register
HS/HD File Compiler

ASAP™ Sync Dual Port
HD SRAM Compiler

Single Port HS/HD
Register File Compiler

ASAP™1 Port HD
Register File Compiler

ASAP™ 1 Port HD
Register File Compiler

Sync HS/HD
ROM Compiler

ASAP™ 2 Port HD
Register File Compiler

HD 2 Port Register
File Compiler

ASAP™ Sync Metal
HD ROM Compiler

Standard
I/O

Base I/O Library (2.5V & 3.3V)

LVTTL/LVCMOS, HSTL, PCI,

SSTL2, PCI-X, USB1.1 pads

0.13µm Nominal High VT Library Offerings

Partner	ARM	Virage Logic
Status	Silicon Validation Reports are Available Upon Request
	Design Kits are available from each Partner
Components	SAGE-X2™ Standard Cell Library	ASAP™ UHD Standard Cell Library
		ASAP™ Sync Single Port HD SRAM Compiler
		ASAP™ Sync Dual Port HD SRAM Compiler
		ASAP™ 1 Port HD Register File Compiler
		ASAP™ 2 Port HD Register File Compiler
		ASAP™ Sync Metal HD ROM Compiler

* 0.13um nominal and nominal with high Vt libraries can be used on same die

0.13µm Library Offerings - LP

Partner

ARM

Virage Logic

Status

Silicon Validation Reports are Available Upon Request
Design Kits are available from Each Partners

Standard
Cells

SAGE-X2™ Standard

Cell Library

1.2V & 1.5V Core Voltage

Memory

Sync HS/HD Single Port

SRAM Compiler#

ASAP™ Sync HD

SP-SRAM Compiler A

Sync HS/HD Dual Port

SRAM Compiler#

ASAP™ Sync HD

DP SRAM Compiler #

HS/HD Single Port

ASAP™ ULP Sync HD

1Mb Via ROM Compiler

HS/HD 2 Port

Sync HS/HD Programmable

Diffusion ROM Compiler#

# - 1.5V Core Voltage
A - 1.2V Core Voltage

0.13µm Nominal Library Offerings

	ARM	Virage Logic
Status	Silicon Validation Reports are Available Upon Request Design Kits are available from each partner
Components	SAGE-X2™ Standard Cell Library	ASAP™ HD Standard Cell Library
	Sync Single Port HS/HD SRAM Compiler	ASAP™ Sync Single Port HD SRAM Compiler
	Sync Dual Port HS/HD SRAM Compiler	ASAP™ Sync Dual Port HD SRAM Compiler
	Sync HS/HD Diffusion ROM Compiler	ASAP™ Single Port HD Register File Compiler
	Single Port HS/HD Register File Compiler	ASAP™ 2 Port HD Register File Compiler
	2 Port HS/HD Register File Compiler	ASAP™ Sync Metal HD ROM Compiler
	HS SP-SRAM Compiler	STAR HD SP-SRAM (redundancy)
	In-line I/O Library 3.3V, 5V Tolerant	Base I/O Library (2.5V & 3.3V) LVTTL/LVCMOS, HSTL, SSTL2, PCI, PCI-X, USB1.1 pads
	Staggered I/O Library 3.3V, 5V Tolerant

0.18µm Chartered Industry Baseline Library Offerings

Partner	ARM
Status	Silicon Validation Reports are Available Upon Request
Status	Design Kits are available from Each Partners
Components	SAGE-X^TM Standard Cell Library
	I/O Library (In-Line & Staggered)
	PCI I/O Library (In-Line & Staggered)
	Sync Single Port SRAM Compiler
	Sync Dual Port SRAM Compiler
	Sync ROM Compiler

0.18µm Chartered Baseline Library Offerings

Partner	ARM	Synopsys	Virage Logic
Status	Silicon Validation Reports are Available Upon Request
Status	Design Kits are available from Each Partners
Components	SAGE-X^TM Standard Cell Library*	Standard Cell Library	Sync Single Port SRAM Compiler
	I/O Library (In-Line & Staggered)	I/O Library (In-Line & Staggered)	Sync Dual Port SRAM Compiler
	PCI I/O Library (In-Line & Staggered)	PCI I/O Library (In-Line & Staggered)	2 Port Register File Compiler
	Sync Single Port SRAM Compiler	Sync Single Port SRAM Compiler	Sync ROM Compiler
	Sync Dual Port SRAM Compiler	Sync Dual Port SRAM Compiler
	Sync ROM Compiler*	Async 2 Port SRAM Compiler
		Sync ROM Compiler

* Silicon Validation Q4 2004

0.25µm Library Offerings

Partner	ARM	Synopsys	Virage Logic
Status	Silicon Proven through Library Qualification Vehicle
Status	Design Kits are available from each partners
Components	SAGE-X^TM Standard Cell Library	Standard Cell Library	Sync Single Port SRAM Compiler
	I/O Library (In-Line)	I/O Library (In-Line & Staggered)	Sync Dual Port SRAM Compiler
	PCI I/O Library (In-Line)	PCI I/O Library (In-Line & Staggered)	1 Port Register File Compiler
		Sync Single Port SRAM Compiler	2 Port Register File Compiler
		Async Single Port SRAM Compiler
		Async Dual Port SRAM Compiler
		Async 2 Port SRAM Compiler
		Sync ROM Compiler

0.35µm Library Offerings

Partner	Synopsys (Passport)	Virage Logic
Status	Silicon Proven through Library Qualification Vehicle
Status	Design Kits are available from each partners
Components	Standard Cell Library	Sync Single Port SRAM Compiler
	I/O Library (In-Line)	2 Port Register File
	PCI I/O Library (In-Line)
	Sync Single Port SRAM Compiler
	Async Single Port SRAM Compiler
	Async Dual Port SRAM Compiler
	Async 2 Port SRAM Compiler
	Sync ROM Compiler