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Chartered Semiconductor Manufacturing and Virage Logic Deliver Industry’s
Fastest Embedded Memories
Optimized IP Memory Components Set
Performance Record of 700 MHz At 1/5th the Power Consumption Previously
Available
FOR IMMEDIATE RELEASE:
Wednesday, April 8, 1998
Milpitas, Calif. -- Chartered Semiconductor Manufacturing and Virage Logic,
a leading supplier of physical intellectual property for system-on-chip (SOC)
IC’s, today announced Virage's Custom-Touch TM and Self-Testable Memory
Compilers TM will be available for Chartered’s advanced 0.25 micron CMOS
process. Custom-Touch memory compilers allow Chartered’s foundry customers to
embed highly optimized memory components into SOC ICs without needing
specialized memory design expertise.
Chartered Semiconductor Manufacturing is the first foundry to announce support for Virage
Logic’s 0.25-micron memory compilers. Virage will make the compiler available
this month with foundry tape-outs scheduled for later in the year. In
addition, Virage has released compilers that are silicon qualified at 500MHz
for Chartered's 0.35-micron process.
With embedded memory consuming up to 80 percent of the real estate on a
complex chip, access to dense, fast, and low power memory cells are essential
to successful SOC IC design. In a 0.25-micron CMOS process, Virage Logic’s
optimized memory compilers can generate cells capable of supporting 700 MHz
cycle times while consuming only one-fifth the power of previous designs. With
the new compilers designers can build cells that consume as little as 0.1
mW/MHz at 1.8 V without any significant area penalty.
"We are pleased to be working with Virage Logic as part of our growing
portfolio of EDA and IP program partners. These memory compilers allow
Chartered to expand the range of density, power and speed options available
for customers that need 6T embedded SRAM capability," said S.Y. Tan-Stahel,
EDA/A marketing director at Chartered Semiconductor Manufacturing. "Users of these Virage
compilers can be sure that their memory designs will be optimized for our
foundry processes."
Process-and-array approach
Unlike previous memory compilers which utilized least common denominator
or generic design rules to build memories, Virage’s compilers create
"Process-and Array" optimized designs. The compilers utilize a database of
hundreds of cell designs characterized to a specific process and optimized
using Virage’s extensive experience in designing custom memories.
Virage Logic’s memory compilers allow designers to rapidly optimize the
memory for each design. The memory compilers offer a variety of features
including zero DC power, flexible aspect ratios, multiple output drive
options, flexible number of bits per word, and tri-state or always active
outputs.
Virage Logic’s memory compilers are available in two versions: High
Performance or Ultra Low Power. Each supports synchronous single and dual port
RAM’s, multi-port register files, asynchronous and synchronous ROM. Virage
Logic’s Self-Testable Memory Compiler (STMC) adds built-in-self test (BIST),
fault modeling, and diagnostic capabilities to ensure high yield on larger
memories.
The compilers also simplify the integration of embedded memories into
System-on-chip designs by generating a complete set of front- and back-end
model views and data for use with leading EDA tools. By combining optimized
memory components complete with test and diagnostics with integrated support
for popular EDA Tools, STMC clearly represents the next major leap forward in
memory compilers.
"While the memory compilers used in 0.5 and 0.35-micron designs were to
some degree process optimized and supported by EDA tools, they didn’t offer a
complete embedded memory solution," stated Adam Kablanian, Presidient and CEO
of Virage Logic. "With support for multi-range optimization, BIST, including
fault models, and full diagnostics for manufacturing, Virage Logic’s new
compiler family marks the beginning of the next generation in memory compiler
evolution and the first tool of its kind to offer an embedded memory solution
for easy ASIC integration. We are pleased that Chartered has recognized the
need for high quality, optimized embedded memories and chose Virage to work
with on both 0.35 and 0.25-micron."
About Chartered
Chartered Semiconductor Manufacturing (www.charteredsemi.com) is a leading
dedicated foundry, offering advanced wafer manufacturing processes for a broad
range of CMOS logic, memory and mixed-signal technologies. Through alliances
with complementary service providers, Chartered helps customers gain access to
best-in-class services ranging from design to assembly and final test of
packaged chips.
Known for quality processes and exceptional customer service, Chartered is
a recipient of Semiconductor International Magazine's Top Fab award.
Headquartered in Singapore, the Company operates sales and service offices
worldwide. Chartered is a member company of Singapore Technologies, a
technology-based multinational conglomerate with 1997 revenues of S $5.4
billion (US $3.4 billion).
About Virage Logic
Founded in January 1996, Virage Logic provides semiconductor suppliers and
electronics systems companies with ultra-low power, high performance physical
intellectual property components for Systems-on-a-chip. The company’s products
include Custom-Touch Memory Compiler (CTMC) which delivers custom design
results automatically and Self-Testable Memory Core (STMC) which adds BIST to
CTMC for integration into Systems-on-a chip. Virage Logic is also completing
the development of an ultra-low power ASIC design methodology utilizing a
patented Module Based ASIC (MBATM) architecture for standard cell and gate
array implementations. With CTMC, STMC and MBA, Virage Logic has the key
ingredients to provide high quality, high-value semiconductor IP for systems
on a chip. Virage Logic Corporation is located at 1641A South Main Street,
Milpitas, California 95035. Telephone: (408) 263-7700. Fax: (408) 263-9523.
Please visit http://www.virlog.com/.
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