CHARTERED AND SINGAPORE'S INSTITUTE OF MICROELECTRONICS COLLABORATE ON ADVANCED FINE-PITCH PACKAGING RESEARCH
SINGAPORE - July 11, 2006 - Chartered Semiconductor Manufacturing (Nasdaq: CHRT and SGX-ST: Chartered), one of the world's top dedicated semiconductor foundries, and A*STAR's Institute of Microelectronics (IME), Singapore have entered into a research collaboration to optimize a range of fine-pitch packaging technologies for copper metallization and low-k dielectric silicon processes at 65 nanometer (nm) and below.
The research is based on the 65nm processes developed by Chartered and its joint development partners, IBM, Infineon Technologies and Samsung Electronics Co. In addition to enabling more choices, the Chartered-IME collaboration means designers could potentially benefit from silicon-proven solutions and modeling tools to characterize the impact of fine-pitch package on silicon early in the design development cycle, which should improve manufacturability and back-end-of the-line yield performance.
As the industry places increasing value on high-performance, power-driven system-on-chip products with a large number of input/output signal lines and interconnects, fine-pitch packages will require bump chip pitches below 180 micron. However, there is no manufacturing-worthy fine-pitch packaging solution today due to implementation challenges and the complex interaction between the silicon and packaging technology.
"Our collaboration with IME is aimed at developing industry solutions that give the semiconductor industry a silicon-proven fine-pitch packaging solution," said Dr. Liang-Choo "LC" Hsia, senior vice president of technology development at Chartered. "With the transition to 65nm, companies are realizing that having a successful backend packaging strategy is a key to realizing volume ramp quickly and meeting time-to-market goals. Chartered is committed to being a leader in research and development of solutions that support our customers in realizing superior and reliable results in partnership with a value chain."
To meet technically demanding requirements, the research will utilize a large die, copper/low-k test chip structure that has a fine bump pitch. The work will investigate the package-level reliability and optimize the performance against various fine-pitch packaging technologies. These include high-lead solder bump, copper posts and polymer encapsulation. Additionally, modeling tools will be built to capture the correlation between the fine-pitch packaging technologies and test structure stress levels, integrity and performance. Using the modeling results, the impact of under-bump metallurgy on low-k integrity and the compatibility of underfill materials with low-k structures will also be evaluated and characterized.
"The research collaboration integrates IME's proven expertise in backend packaging know-how with Chartered's success in advanced copper metallization and low-k dielectric process manufacturing," said Professor Dim-Lee Kwong, Executive Director of IME. "We are excited with the opportunity to work together to resolve one of the industry's most challenging back-end integration challenges and provide our mutual customers with a reliable path from manufacturing to final chip packaging."
About Chartered
Chartered Semiconductor Manufacturing (Nasdaq: CHRT, SGX-ST: CHARTERED), one of the world's top dedicated semiconductor foundries, offers leading-edge technologies down to 65 nanometer (nm), enabling today's system-on-chip designs. The company further serves the needs of customers through its collaborative, joint development approach on a technology roadmap that extends to 45nm. Chartered's strategy is based on open and comprehensive design enablement solutions, manufacturing enhancement methodologies, and a commitment to flexible sourcing. In Singapore, the company operates a 300mm fabrication facility and four 200mm facilities. Information about Chartered can be found at http://www.charteredsemi.com.
About IME
The Institute of Microelectronics (IME) is a member of Singapore's Agency for Science, Technology and Research (A*STAR). Positioned to bridge the R&D between academia and industry, IME's mission is to increase value-add to the electronics industry in Singapore by engaging in relevant R&D in strategic fields of microelectronics; supporting and partnering the electronics industry; and developing skilled R&D personnel. Its key research areas are in integrated circuits and systems; semiconductor process technologies and microsystems, modules and components.
IME is playing a leadership role in the advancement of semiconductor technology. It started its research on packaging copper/low-k devices in 1999 and has launched three industry consortia to address the various research challenges. In the Wafer Technology Consortium launched in 2002 with 10 participating companies, the research team demonstrated for the first time a reliable flip chip package for copper/ultra-low-k devices. The leading research effort also delivered new concepts for flip chip packaging solution which meet all industrial level reliability tests. Information about IME can be found at http://www.ime.a-star.edu.sg.
Safe Harbor Statement under the provisions of the United States Private Securities Litigation Reform Act of 1995
This news release contains forward-looking statements, as defined in the safe harbor provisions of the U.S. Private Securities Litigation Reform Act of 1995. These forward-looking statements, including without limitation, statements relating to how the Chartered-IME collaboration is expected to improve manufacturability and back-end-of the-line yield performance, developing such industry solutions and how it is expected to give the semiconductor industry a silicon-proven fine-pitch packaging solution, reflect our current views with respect to future events and financial performance and are subject to certain risks and uncertainties, which could cause actual results to differ materially from historical results or those anticipated. Among the factors that could cause actual results to differ materially are: demands from our major customers, specifically products from Fab 7; ramp schedule of Fab 7; unforeseen delays or interruptions in our plans for our fabrication facilities; the performance level of and technology mix in our fabrication facilities; our progress on leading edge products; the successful implementation of our partnership, technology and supply alliances and competition. Although we believe the expectations reflected in such forward-looking statements are based upon reasonable assumptions, we can give no assurance that our expectations will be attained. In addition to the foregoing factors, a description of certain other risks and uncertainties which could cause actual results to differ materially can be found in the section captioned "Risk Factors" in our Annual Report on Form 20-F filed with the U.S. Securities and Exchange Commission. You are cautioned not to place undue reliance on these forward-looking statements, which are based on the current view of management on future events. We undertake no obligation to publicly update or revise any forward-looking statements, whether as a result of new information, future events or otherwise.
