Wafer fab, process and packaging
From blank wafer to packaged die, explained step by step
Chartered Semi is a plain-language reference for chip design, wafer fabrication and advanced packaging, written for the people who work next to the process rather than around it.
Newest first
Latest explainers
The most recent guides published here, in the order they went up.
What Reflow Soldering Is and How It Works: PCB Basics 2026
What reflow soldering is and how it works in , from paste printing and component placement to temperature profiles, flux activation, wetting…
Lead Free Solder in Electronics Explained (2026)
Lead free solder in electronics explained: alloy families, melting ranges, working temperatures, benefits, drawbacks and a repeatable bench process for .
Underfill in Flip Chip Assembly Explained (2026): A Guide
Learn underfill in flip chip assembly explained in , covering materials, dispensing, curing, benefits, failure modes and process guidance for packaging…
SOIC vs QFN vs BGA Package Comparison: Which Is Best in 2026?
SOIC vs QFN vs BGA package comparison: size, pin count, thermal resistance, assembly and cost, so you can pick the right IC…
How to Read a Chip Datasheet: A Practical Guide (2026)
Learn how to read a chip datasheet step by step: absolute maximum ratings, recommended operating conditions, min/typ/max columns, timing, pinouts and errata.
Mold Compound in Chip Packaging Explained: Basics (2026)
Mold compound in chip packaging explained: what EMC is, how it shields a die, how fillers change flow and warpage, and how…
How to Decode a Chip Part Number: Simple Guide 2026
Learn how to decode a chip part number step by step: find the manufacturer, split the base number, and read package and…
BGA vs LGA Sockets Explained: Which Cools Better in 2026?
BGA vs LGA sockets explained for : compare contact types, soldered vs removable CPUs, thermal performance, compatibility, failure risks and repair.
What a Leadframe Is in Chip Packaging (2026) Explained
What a leadframe is in chip packaging, explained: how it holds and connects the die, materials and plating, wire-bond vs flip-chip, tradeoffs,…
The process stack
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Every guide is filed under the part of the flow it belongs to, from design through fab to assembly and test.
Asked at the design review
Questions this site answers
- What actually happens during a single lithography step?
- Why can a design that passes timing still fail in silicon?
- When does advanced packaging beat moving to a smaller node?
- Which process choices drive the cost of a wafer the most?
What this site is for
A reference for how chips get made
Chartered Semi explains how a chip goes from design intent and mask data through lithography, etch and deposition to assembly, packaging and test, one step at a time and without the marketing layer.
It is written for fabless engineers, EDA and IP users, students reading their way into the industry, and anyone who needs the process described in terms they can use.