Dalton Briggs

Here is the short answer: transistors shrink because lithography keeps printing smaller features, and for decades each generation cut key dimensions by roughly 0.7x … Read more

Dennard scaling is a law from a 1974 IEEE paper that says transistor dimensions, supply voltage and doping can be shrunk together so that … Read more

Moore’s Law is the observation, first published by Intel co-founder Gordon Moore in 1965, that the number of transistors you can fit on a … Read more

A FinFET is a three-dimensional transistor in which the gate wraps around a thin, vertically standing silicon fin on three sides instead of controlling … Read more

Choosing between the 3nm and 5nm process nodes comes down to one question: does the smaller node buy enough performance-per-watt or logic density to … Read more